Designing an FPGA board.
Few month ago, I decided to design my own FPGA development board. The main reason for that was simply learn to do it, because I have design a lot o boards for peripherals, PMODs, or other projects, but never one based on FPGA, and for me, route a BGA was a big challenge.
Asymmetric multiprocessing on Zynq MPSOC.
On many applications, specially when we talk about signal processing, on the same application there is a mix of real time processing and a non-real time operating system, or on machine learning applications, when we can have a mix of a fast acquisition system, and a powerful operating systems for...
Using moving average filters for hard filtering.
It’s September, most of you will come back to work, others don’t remember what is that of holidays, and others, luckiest people, will start your holidays soon. I am in the first group, so I have to back to work, and also, back to write here :).
Custom AXI IP for acceleration.
I will use this post to show you how, creating an AXI IP, we can accelerate our applications on Petalinux, or in case we use a Zynq MPSOC, we also can accelerate an application running in the RPU.
Single tone detector with Genesys ZU and RTU.
When I started to investigate about signal processing, what made me feel happier was decode a signal that, apparently, has no sense. Discrete Fourier Transform (DFT) turns something meaningless into something meaningful. That is amazing but, if we are looking for the value of one component of the...
Genesys ZU and Zynq US+.
This week I have received the big (big) sister of the Eclypse Z7, the Digilent’s Genesys ZU. This board, due to its FMC, ZMOD and PMOD is a good choice for digital signal processing applications, but first, let’s take a look to its brain, a powerful Zynq Ultrascale +.
EclypseZ7, Petalinux and signal processing at the edge.
In my last post, I said 2 things come to my mind when we talk about signal processing. One of them is FFT, and I explained you how to compute an xFFT on the Digilent’s EclypseZ7, or other Xilinx 7 series device, the other thing that I talked, was the sinc function. This function, is used, besides...
[AN001] Designing from zero an IIR filter in Verilog using biquad structure and bilinear discretization.
Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of the applications are connected to the real world, so they need to captur...