controlpaths.com

My FPGA development environment

When a developer wants to start to develop, the first they have to do is install the development environment. This usually is not a big deal, you just have to download the environment installation file and install it. Maybe, if you use Linux as your operating system, you will have to run some ext...

Published by P.Trujillo on Sep 16, 2023

Getting started with Red Pitaya STEMlab

A few years ago, I started to hear about Red Pitaya. The first I heard about this device is that it was a Zynq-based board, actually, a Zynq-based development board. Then, doing some research on the internet I discovered that it is not just a development board, but it is a sort of Analog Discover...

Published by P.Trujillo on Sep 2, 2023

The Gate Array News 2023.

Another season is coming to an end. This season in controlpaths.com have been published 24 articles talking about SDR, developing designs for Microship’s PolarFire SoC, implementing designs in the cloud and also a great collaboration with Speedgoat (SPOILER: This will continue this season with bi...

Published by P.Trujillo on Jul 29, 2023

Designing IIR filters in Python.

Calculating the coefficients of an IIR filter is something familiar in this blog. In general, when I have to design a new filter, I usually do it in MATLAB because I already have a set of scripts to design different types of filters. Things get complicated when, for example, I don’t have a MATLAB...

Published by P.Trujillo on Jul 15, 2023

Implementing a Buck converter in RTL.

FPGAs are great devices to make math and, fortunately, almost all in this world are maths so, can we implement anything on an FPGA? Uhh I wouldn’t like to say yes fastly but, maybe… In this blog, we saw how we can implement physical models on an FPGA using MATLAB and Speedgoat, but on that occasi...

Published by P.Trujillo on Jul 1, 2023

Developing a SYZYGY peripheral

A few years ago, when I started to hear about SYZYGY, it seems me very useful interface because it is in the middle of PMOD and FPGA Mezzanine Card (FMC). Before that, all high-speed interfaces, even if they use only a few pins, were connected to the carrier board using a high pin density FMC, hi...

Published by P.Trujillo on Jun 17, 2023

DMA, Petalinux and the ZUBoard-1CG

Zynq MPSOC are complex device. Complex because its Processing System (PS) is based on a heterogeneous multi-core consisting of a dual or quad ARM Cortex-A53 and a dual ARM Cortex-R5. In addition, those four or six cores are surrounded by an FPGA or Peripheral Logic (PL). But they are also complex...

Published by P.Trujillo on Jun 4, 2023

Application notes

[AN001] Designing from zero an IIR filter in Verilog using biquad structure and bilinear discretization.

Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of the applications are connected to the real world, so they need to captur...