controlpaths.com

Remote debugging via hardware server.

In my daily life, as with other FPGA developers, I have a laptop where I write the code, and I connect to a remote host to synthesize and implement the FPGA designs. This offers me many advantages. The most important one is that I don’t need a very powerful processor or a large amount of RAM, sin...

Published by P.Trujillo on Nov 8, 2021

Implementing high order filters with FIR Compiler.

Many times, in our designs we find a signal that our interest band of frequency is very close to the band that we need to reject. In this case, in general, the most efficient way to attenuate the unwanted signal is using a 4th or 6th order IIR filter. This method will work very well, however, as ...

Published by P.Trujillo on Oct 25, 2021

FFT algorithm using an FPGA and XDMA.

In this blog we talked (a little) about the xDMA IP from Xilinx, and how to send and receive data through PCI using an FPGA. On that occasion, we used the Picozed board with the FMC Carrier gen 2. This time the board used Litefury from RHS research. This board is the same as the ACORN CLE-215, an...

Published by P.Trujillo on Oct 11, 2021

Controlling a SMPS from MSS with SmartFusion2 SoC.

FPGAs have been present in the telecommunications field for many years, almost since they were created. On the other side, there are fields where FPGAs have not arrived yet for several reasons such as power consumption or price. But there are other groups where FPGAs have not been present for man...

Published by P.Trujillo on Sep 27, 2021

Implementing a dual core processor in FPGA.

A few years ago, microprocessors manufacturers competed to get the fastest processor. High speed means more tasks can be executed in the same amount of time, but also, means higher power consumption. To improve this, the voltages of the core start decreasing to levels below 1V, and according to t...

Published by P.Trujillo on Sep 13, 2021

Using PCIe in Xilinx 7 Series.

When we look into communicating an FPGA with a computer, the first interface that we can find is UART, but this interface has several limitations in terms of speed. In order to transfer a high amount of data between the CPU and an FPGA, we will need to use some more sophisticated interfaces like ...

Published by P.Trujillo on Aug 30, 2021

Creating Pynq images for custom boards.

In this blog we already talk about Pynq and how it can help us to develop some applications in a easy way. Obviously, Pynq has its limitations but it is still a powerful tool with which we can develop projects in a few minutes. Pynq is Jupyter-notebook based, and includes the corresponding librar...

Published by P.Trujillo on Jul 26, 2021

Application notes

[AN001] Designing from zero an IIR filter in Verilog using biquad structure and bilinear discretization.

Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of the applications are connected to the real world, so they need to captur...