Genesys ZU and Zynq US+.

This week I have received the big (big) sister of the Eclypse Z7, the Digilent’s Genesys ZU. This board, due to its FMC, ZMOD and PMOD is a good choice for signal processing applications, but first, let’s take a look to its brain, a powerful Zynq Ultrascale +.

As I said, this board is based on Zynq Ultrascale+ MPSOC, of ZU3EG family. This family is in the mid range of the MPSOCs, but is more similar to the highest range than to the lowest range. The device is the same as AVNET’s Ultra96, with different package, which gives us more pins to connect more peripherals.

Genesys ZU and Eclypse Z7

Zynq US+ MPSOCs have 4 different kind of processors inside, and each one with several cores. First, we have the APU (Applicacion Processor Unit). This core is based on 4xARM A53, running up to 1.5 GHz (depending on the input oscillator’s speed). We can compare this core with the 2xARM A9 core found in Zynq7000 family, but with a significant increase of power. This core, like Zynq7000 series, can run Linux, some kind of RTOS or a Bare Metal application. Honestly, this is not the goal of this processor. In Zynq 7000 series, can be useful run a bare metal application in A9 core, because it is the only hard core inside, and maybe we cannot integrate a Microblaze. But in this case, we have another hard core designed for bare metal applications.

Where we can execute bare metal applications is in the RTU (Real Time Unit). This core is based on 2xCortex R5 cores which can run up to 600Mhz. This 2 cores can run each one with its own application (Split mode), or both executing the same application, and comparing the results for avoid failures (Lock-Step Mode). This core has access to the AXI bus, so it can be connected to PL in the same way than the APU. That is interesting for signal processing, if we connect the ZMOD ADC to the SYZYGY port, driver can be implemented in RTL for reach maximum speed, and data can be buffered and then read by RTU, where a signal processing algorithm can be implemented in C programming language.

Third processor inside Zynq US+ on the EG and EV devices is a GPU. This unit is not available for execute code, and will be used by the OS to execute multimedia tasks. And the last one is the PMU (Platform management Unit), which is a Microblaze processor in charge of the device boot.

Regarding on the peripherals on Genesys ZU, it has typical peripherals that we can find in other boards like Ethernet, USB, several push buttons, switches and 4 PMODs. In this board we can also find a DIMM DDR4 4G of RAM, which can be upgradeable, a PCIe, initially for add an SSD unit or Wifi card, or maybe test some other boards like PicoEVB.

FMC and SYZYGY ports on Genesys ZU

Also, we can find FMC and SYZYGY ports for add some high speed peripherals like ADCs or DACs and a 24 bits, 96kHz audio codec from analog devices connected to PL, that with the RTU, makes easy to design some audio processing algorithm.

Summarizing, Digilent’s Genesys ZU has a lot of possibilities for signal processing, and thanks to Zynq US+, and the FMC and SYZYGY, give us the possibility to choose algorithms for signal processing on the edge (PL+RTU), or a post processing with more powerful SW tools like Python (PL+APU). Thanks for read!

Leave a Reply