FFT algorithm using an FPGA and XDMA.
In this blog we talked (a little) about the xDMA IP from Xilinx, and how to send and receive data through PCI using an FPGA. In that occasion we used the Picozed board with the FMC Carrier gen 2. This…
Tag hdl
Implementing a dual core processor in FPGA.
Few years ago, microprocessors manufacturers competed to get the faster processor. High speed means more tasks can be executed in the same amount of time, but also, means higher power consumption. To improve this, the voltages of the core starts…
Using Xilinx’s FIR Compiler.
When we need a FIR filter, in general, or at least in my case, we already have a FIR filter HDL, where we only need to change the filter order to the application needs, in most cases this configuration can…
Eclypse Z7 and xFFT.
When we talk about digital signal processing, 2 things come to my mind. First one is the sinc wave, used as a cover page of a lot of books about signal processing, and the second one, is the fourier transform.…