Development boards I use.
Many times, developers who want to take their first steps in the world of the FPGAs ask me about a development board which begin to test their first designs. From the newie point of view, I understand that see a…
Using IIO to manage an ADC from Petalinux.
Manage an ADC is something that any engineer dedicated to signal processing has to do very often. This task, in general, use to be no much complicated, unless you are using a high-speed ADC with LVDS interface or something similar,…
Connecting an SSD to Zynq MPSOC.
Devices like Xilinx Zynq or Microchip PolarFire give us the possibility to mix in a single design a high level OS like Linux and a fast device like FPGA. For signal processing, or even data science, is very interesting to…
Using HDL Coder WFA to implement a distortion effect.
If you have read some posts on this blog, you can see that FPGAs are a very good choice if you want to develop some digital signal processing algorithm, but for some reason, maybe because they are (a bit) more…
Using FPGA Data Capture to debug a design.
On the project developed on the last 2 posts, to verify the behavior of the filter, we had used the data acquired from the ILA. Data was processed on MATLAB with a script where we read the csv, and verify…
Using DSP48E1 Slice.
A few years ago, FPGAs were used almost exclusively for communication systems. On the other hand, DSPs are used to execute digital signal processing algorithms. The reason is the hardware components that were integrated. FPGAs, were based on flip-flops, LUTs…
Discovering SDR with GNU Radio and USRP B205Mini.
This post will be different from what I usually write. In general, in my posts, I talk about low-level algorithms and FPGA implementations to do digital signal processing, but this time I will use software to configure an specific purpose…
Increasing ADC resolution using oversampling.
After a few post dedicated exclusively to the FPGA, on this post I going to talk about a technique that can help us to improve the ADC resolution. To study this technique, we will use as a example the ADC…
Using Xilinx’s FIR Compiler.
When we need a FIR filter, in general, or at least in my case, we already have a FIR filter HDL, where we only need to change the filter order to the application needs, in most cases this configuration can…
Creating an AXI Stream IP for an acquisition system.
On the last post, we talk about the using of DMA to send data between PL and PS on SOC or MPSOC devices. The example that I proposed, was a kind of FFT compute accelerator, where a signal stored on…