Building a SoC with Litex.
There are many cases where we will need a processor inside our FPGA. In my case, soft cores are very useful when I have to implement in the FPGA a manager for an external device using high level interfaces like…
Category hdl
Discovering Gowin FPGA.
Few weeks ago Dialog Semiconductor announced a new series of FPGAs named as ForgeFPGA. The highlight of these new devices are not a high processing power, the highest speed or the big they are, the main highlights of these devices…
Single pole filter without multiplications.
When I am working in a design for an FPGA, which involves the acquisition of any signal, I usually have to design a filter before using that signal in the control loop, or a protection. If the use of this…
Creating Pynq images for custom boards.
In this blog we already talk about Pynq and how it can help us to develop some applications in a easy way. Obviously, Pynq has its limitations but it still being a powerful tool with we can develop projects in…
Adding windows to xFFT IP.
Digital signal processing algorithms are, in general, purely mathematical algorithms that works perfectly on our notebook or MATLAB, but in real design, the algorithm starts to return us some unexpected results. One example of that is the quantification error. While…
Implementing a FIR filter using folding.
In this blog we have seen how to develop a FIR filter. In this post you have an example of FIR filter where the coefficients are configured though AXI4-Lite interface. The goal of that post was the implementation of a…
Implementing a digital biquad filter in Verilog.
Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of…
Using DSP48E1 Slice.
A few years ago, FPGAs were used almost exclusively for communication systems. On the other hand, DSPs are used to execute digital signal processing algorithms. The reason is the hardware components that were integrated. FPGAs, were based on flip-flops, LUTs…
Using the DMA and AXI4 Stream on Zynq US+.
When we are working with a SOC or MPSOC, is very common the data interchange between the PL and the APU, or between the PL and the RPU. To do that, the Zynq platform gives us several interfaces between the…
Using moving average filters for hard filtering.
It’s September, most of you will come back to work, others don’t remember what is that of holidays, and others, luckiest people, will start your holidays soon. I am in the first group, so I have to back to work,…