Several years ago, electronic designs began to feature System on a Chip (SoC) technology. This technology is an excellent choice for designs that require a higher integration or a reduction in Bill of Materials (BOM) cost. On this blog we…
Filtering is likely the most common DSP algorithm that any embedded engineer has to design, no matter it they are developing for an STM32, or TI DSP or, of course, en FPGA. Filtering is such important because the majority of…
For developers who work with FPGA and digital signal processing, and for signal processing I mean audio signals, video signals, radio signals, … sure they have used the AXI4-Stream protocol. The AXI4-Stream protocol is used as a standard interface to…
Many times, developers who want to take their first steps in the world of the FPGAs ask me about a development board which begin to test their first designs. From the newie point of view, I understand that see a…
Manage an ADC is something that any engineer dedicated to signal processing has to do very often. This task, in general, use to be no much complicated, unless you are using a high-speed ADC with LVDS interface or something similar,…
Devices like Xilinx Zynq or Microchip PolarFire give us the possibility to mix in a single design a high level OS like Linux and a fast device like FPGA. For signal processing, or even data science, is very interesting to…
If you have read some posts on this blog, you can see that FPGAs are a very good choice if you want to develop some digital signal processing algorithm, but for some reason, maybe because they are (a bit) more…
On the project developed on the last 2 posts, to verify the behavior of the filter, we had used the data acquired from the ILA. Data was processed on MATLAB with a script where we read the csv, and verify…
A few years ago, FPGAs were used almost exclusively for communication systems. On the other hand, DSPs are used to execute digital signal processing algorithms. The reason is the hardware components that were integrated. FPGAs, were based on flip-flops, LUTs…
On last post, we had designed a filter with filter designer tool from MATLAB. After verify the filter on MATLAB and Simulink, we have to generate the HDL and verify the implementation using FPGA-in-the-Loop, and later, verify the filter on…
